Conventionally, a DC-to-DC converter employs Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) in its power stage to serve as the high-side and low-side switches alternatively switched to convert a supply voltage to a desired output voltage. However, when semiconductor processes are developed to shrink integrated circuits more and more, the function of a MOSFET is limited due to the high conductive resistance and large gate capacitance of the MOSFET, and thereby the design requirements are not satisfied any more. Recently, Junction Field-Effect Transistors (JFETs) attract circuit designers' attention more and more, for a JFET has a lower conductive resistance and smaller gate capacitance than a MOSFET. Unfortunately, conventional MOSFET driver circuits are not applicable for JFET driver circuits, and therefore it is required to find new solution for driving JFETs.
A current art uses a conventional MOSFET driver in association with an RC circuit outside of the MOSFET driver chip to drive a JFET. As shown in FIG. 1, a conventional JFET driver circuit 100 comprises a switching circuit composed of PMOSFET 102 and NMOSFET 104 coupled between a voltage VDD and ground GND, which are alternatively switched by a voltage signal Vs to generate a voltage signal 106 having a high level 108 approximately equal to VDD and a low level 110 approximately equal to zero, and the voltage signal 106 is supplied to an RC circuit composed of a current limit resistor 112 and a capacitor 114 shunt to the resistor 112, to thereby generate a JFET driving signal 116. The capacitor 114 is charged and discharged by the voltage signal 106 in the manner that, during the high level 108 of the voltage signal 106, the capacitor 114 is charged to thereby have the JFET driving signal 116 at a high level 118 of about 0.7V, and in response to the voltage signal 106 transiting to the low level 110, the capacitor 114 begins to discharge, resulting in the JFET driving signal 116 suddenly dropping to a low level 120 of about −(VDD−0.7V) and then increasing gradually.
In the conventional JFET driver circuit 100, the turn-on speed of the driven JFET 122 is determined by the current flowing through the resistor 112, and therefore, for a greater current to turn on the JFET 122 more rapidly, the resistor 112 has a lower resistance. However, a greater current results in a greater power dissipation, and thus conflict is present between the turn-on speed and the power dissipation. Namely, the fast turn-on of a JFET is achieved always together with a high power dissipation. In addition, referring to the JFET driving signal 116 shown in FIG. 1, due to the RC leakage, it is hard to hold a negative turn-off voltage for the driven JFET 122. During the low level 110 of the voltage signal 106, the JFET driving signal 116 will increase gradually, and the JFET 122 may not maintained at the turn-off state. Moreover, if the JFET 122 is a depletion type device, it is hard to promise a turn-off state of the JFET 122 at power start-up state. In detail, at a power start-up of the power supply Vin coupled to the JFET 122, the increasing voltage Vin is applied to the JFET 122, while the conventional JFET driver circuit 100 is unable to turn off the JFET 122 in time. As a result, the power supply Vin will be directly short to ground GND or to the load circuit coupled to the power stage of the converter.
Therefore, it is desired a JFET driver circuit and a JFET driving method, by which low power dissipation, rapid and efficient turn-on of a JFET, holding a negative turn-off voltage for a depletion type JFET, and ensuring a turn-off state of a JFET at power start-up state are all achieved.